Senior HBM Layout Design Engineer | MRL Consulting
- Competitive
- Mexico
- Semiconductor
- Permanent
We are recruiting on behalf of a leading global semiconductor company for an experienced Layout Design Engineer to join their High Bandwidth Memory (HBM) team in Guadalajara. This is an exciting opportunity to contribute to cutting-edge semiconductor design, supporting intensive applications such as artificial intelligence and high-performance computing.
In this role, you will collaborate with global engineering teams to design, verify, and deliver high-quality analog, mixed-signal, and custom digital layouts across multiple projects.
Key Responsibilities
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Design and develop analog, mixed-signal, and custom digital block layouts, including full chip-level integration support.
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Perform layout verification, including LVS/DRC/Antenna checks, quality assurance, and documentation.
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Ensure timely delivery of block-level layouts that meet quality and design standards.
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Lead planning, estimation, scheduling, and execution across multiple project environments.
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Communicate effectively with global teams to ensure project success.
Key Requirements
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Bachelor’s or Master’s degree in Electronics, VLSI Engineering, or a related field.
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Minimum 5 years’ experience in analog/custom layout design within advanced CMOS processes (Planar, FinFET).
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Proficiency in Cadence VLE/VXL and Mentor Graphics Calibre DRC/LVS.
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Hands-on experience designing critical blocks such as temperature sensors, PLL, ADC, DAC, LDO, bandgap, reference generators, charge pumps, and amplifiers.
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Strong understanding of analog layout fundamentals (matching, electromigration, latch-up, crosstalk, IR-drop, parasitics, etc.).
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Knowledge of layout impacts on circuit performance, including speed, power, and area.
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Ability to interpret design constraints and produce high-quality, optimized layouts.
Preferred:
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Experience with multiple tape-outs.
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Proven ability to manage multiple layout projects simultaneously.
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Strong skills in physical verification and quality assurance of custom layouts.
What’s on Offer
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Competitive compensation package with comprehensive benefits.
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Opportunity to work on advanced semiconductor technologies supporting global innovation.
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Collaborative international engineering environment.
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Career development within a world-leading technology organization.
